[1]
Self-Interference in Credit-based AXI Regulation: A Misattributed Write-Latency Penalty and Its Decoupled Elimination
Conference Paper
People / MS (Research)
Sakshi Sharma
Mtech Research Student
Research Scholar
- s25025@students.iitmandi.ac.in
- In the lab
- 2025 – present
Research interests
Real-time and predictable on-chip interconnects: hardware that gives provable latency guarantees on shared AXI buses in multi-core systems-on-chip (SoCs).